| 摘要 |
PROBLEM TO BE SOLVED: To supply a sure synchronizing signal pattern by adding synchronizing signals provided with a pattern for breaking a maximum run following a minimum run. SOLUTION: A DSV bit decision/insertion part 11 performs DSV control on a data string at an optional interval, decides the '1' or '0' of a DSV control bit, inserts it at the optional interval and supplies the data string to a modulation part 12 and a SYNC/SYNCID decision part 13. The modulation part 12 modulates the data stream into which the DSV control bit is inserted and the SYNC/SYNCID decision part 13 decides the pattern of the synchronizing signals and supplies them respectively to a SYNC bit insertion part 14. The SYNC bit insertion part 14 inserts the synchronizing signals decided by the SYNC/ SYNCID decision part 13 into a code stream inputted form the modulation part 12 and supplies them to a Non-Return-to-Zero inversion (NRZI) part 15, the code stream is NRZI-modulated and converted to a recording waveform and a recording waveform sequence is outputted.
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