发明名称 Digital video signal processing apparatus
摘要 <p>In a digital video signal recording and reproducing apparatus using bit rate reduction coding, information multiplexed to each record block is selected depending on the reproducing process applied to reproduce record blocks. When error correction is carried out and then, error concealment is applied to any record block having an error uncorrectable by the error correction, error concealment information indicating that the error concealment was carried out is multiplexed to the record block to be outputted. Also, since the continuity of bit rate reduction encoded data may be broken by concealing a part of record blocks, decoding information for controlling the decoding of bit rate reduction encoded data is multiplexed to the record block to be outputted. When an error concealment is not carried out in the bit rate reduction encoded state, an error flag indicating that an error exists is multiplexed to the record block to be outputted. &lt;IMAGE&gt;</p>
申请公布号 EP0602817(B1) 申请公布日期 2000.03.01
申请号 EP19930309515 申请日期 1993.11.29
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 OOTAKA, HIDEKI;JURI, TATSURO
分类号 H04N7/26;H04N7/30;H04N7/52;H04N9/804;H04N9/888;H04N19/895;(IPC1-7):H04N7/24 主分类号 H04N7/26
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