发明名称 AVAILABLE BIT RATE SCHEDULER
摘要 An available bit rate scheduling method and apparatus for asynchronous transfer mode communication of a plurality of cells over a network characterized by a system clock frequency f and an allowed cell rate ACR. Each cell belongs to an assigned virtual circuit communication channel which is defined by a set of negotiated traffic parameters. The invention partitions the ACR's of the virtual circuits into a smaller subset of profiles/ subprofiles and conducts a deterministic search to service them. The scheduler incorporates a profile generator for iteratively generating a number p of the profiles by (i) outputting a k*modulo 2ith one of the profiles during each kth iteration of the profile generator, where 1 ~ i ~ p and 1 ~ k ~ p-1; (ii) outputting a null profile during each 2pth one of the iterations; and, (iii) dispatching the profiles from the profile generator to the profile queue such that a particular profile is dispatched at a time T = To + (1/ACR) *f, where To is the dispatch time of a profile dispatched immediately prior to the particular profile. A profile queue coupled to the profile generator receives and sequentially stores the generated profiles. A virtual circuit processor sequentially receives the profiles from the profile queue and, for each one of the received profiles, dispatches to an output queue all virtual circuits which are characterized by the one received profile.
申请公布号 CA2172757(C) 申请公布日期 2000.02.29
申请号 CA19962172757 申请日期 1996.03.27
申请人 发明人 RADHAKRISHNAN, SIVAKUMAR;DABECKI, STEPHEN J.;WONG, DAVID WALDEN
分类号 H04L12/56;H04L29/02;(IPC1-7):H04L12/56 主分类号 H04L12/56
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