发明名称 |
Low-voltage, very-low-power conductance mode neuron |
摘要 |
A neural network including a number of synaptic weighting elements, and a neuron stage; each of the synaptic weighting elements having a respective synaptic input connection supplied with a respective input signal; and the neuron stage having inputs connected to the synaptic weighting elements, and being connected to an output of the neural network supplying a digital output signal. The accumulated weighted inputs are represented as conductances, and a conductance-mode neuron is used to apply nonlinearity and produce an output. The synaptic weighting elements are formed by memory cells programmable to different threshold voltage levels, so that each presents a respective programmable conductance; and the neuron stage provides for measuring conductance on the basis of the current through the memory cells, and for generating a binary output signal on the basis of the total conductance of the synaptic elements.
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申请公布号 |
US6032140(A) |
申请公布日期 |
2000.02.29 |
申请号 |
US19960731426 |
申请日期 |
1996.10.15 |
申请人 |
STMICROELECTRONICS S.R.L. |
发明人 |
FABBRIZIO, VITO;COLLI, GIANLUCA;KRAMER, ALAN |
分类号 |
G06G7/60;G06F15/18;G06N3/06;G06N3/063;(IPC1-7):G06F15/18 |
主分类号 |
G06G7/60 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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