发明名称 Method of fabricating high-voltage junction-isolated semiconductor devices
摘要 A method of fabricating a junction-isolated semiconductor device is provided which includes the following steps. Within a first P-type buried region second N-type buried regions are formed. Over the first and second buried regions, an N-type epitaxial layer defining a surface of the device is grown. In the epitaxial layer, P-type isolation regions extending from the surface down to and in electric continuity with the first buried region and defining, with the first buried region, N-type wells incorporating the second buried regions is formed. And, P-type annular border regions in the epitaxial layer and to the side of the isolation regions are formed. The steps of forming isolation regions and annular border regions semiconducting regions being performed in a single step of selectively introducing doping ions.
申请公布号 US6030888(A) 申请公布日期 2000.02.29
申请号 US19970792483 申请日期 1997.01.31
申请人 CONSORZIO PER LA RICERCA SULLA MICROELETTRONICA NEL MEZZOGIORNO 发明人 LEONARDI, SALVATORE
分类号 H01L27/088;H01L21/76;H01L21/761;H01L21/8222;H01L21/8234;H01L21/8248;H01L21/8249;H01L27/06;H01L29/78;(IPC1-7):H01L21/04 主分类号 H01L27/088
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