发明名称 TRAILER PROCESSING SYSTEM
摘要 PROBLEM TO BE SOLVED: To improve the throughput of an entire system by reading control information directly from a trailer buffer storing data in DMA transfer, when reception of frames is finished to eliminate the need for transferring the control information of the trailer section from a memory of a host layer. SOLUTION: A DMA controller 4 stores the contents of transfer to a trailer buffer 3 simultaneously, when DMA transfer of a received frame is conducted to a host layer RAM 8. When a reception control section 6 recognizes the start of reception, the control section 6 generates a reception start interrupt to a CPU 2. The CPU 2 sets a transfer destination address to the DMA controller 4, to start DMA transfer write to the host layer RAM 8. When the reception control section 6 recognizes the end of frame reception, the reception control section 6 completes DMA transfer and generates a reception end interrupt to the CPU 2. The CPU 2 reads the required byte number from the trailer buffer 3, and conducts protocol processings at the CPU 2.
申请公布号 JP2000059464(A) 申请公布日期 2000.02.25
申请号 JP19980228465 申请日期 1998.08.13
申请人 NEC CORP 发明人 SAKURAI AKIRA
分类号 G06F13/00;H04L7/00;H04L12/28;H04L12/951;H04L29/10 主分类号 G06F13/00
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