发明名称 WAFER SCALE PACKAGE STRUCTURE AND CIRCUIT SUBSTRATE USED THEREIN
摘要 PURPOSE: A wafer scale package structure is provided to be a high productivity and cheap, and a circuit substrate is provided to use therein. CONSTITUTION: The wafer scale package structure contains; a wafer(7) having an electrode pad(8); a circuit substrate(6) laminated on the wafer for relining the electrode pad of the wafer, and produced by an insulation layer produced by an insulating resin as a main component; a bonding agent(4) to laminate the circuit substrate on the wafer; a conductive matter to contact the electrode pad of the wafer and the circuit substrate; the wafer and the circuit substrate to be able to divide each in a chip sized-package at the same time; the heat expandability of a metal foil being under 10ppm/°C; a iron-nickel alloy.
申请公布号 KR20000011740(A) 申请公布日期 2000.02.25
申请号 KR19990028646 申请日期 1999.07.15
申请人 NITTO DENKO CO., LTD. 发明人 INOUE YASUSHI;SUKIMOTO MASAKAZU;NAKASAWA MEKUMU;OKEYUI DAKUJI;NAKAMURA KEY
分类号 H05K3/34;H01L21/60;H01L23/12;H01L23/14;H01L23/31;H01L23/498;H05K1/18 主分类号 H05K3/34
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