发明名称 BUFFER ACCESS CONTROL CIRCUIT
摘要 PURPOSE: A circuit for controlling an access of buffers is provided to simplify circuit configuration without using a delay circuit CONSTITUTION: The buffer access control circuit(1) comprises a first latch circuit(10) for latching a data inputted to an input terminal using a lower buffer access signal as a latch signal; a second latch circuit(11) for latching same data with the input data of the first latch circuit(10) inputted to the input terminal using an upper buffer access signal as a latch signal; detect circuits(12, 13) for detecting whether the latch data of two latch circuits(10, 11) are same each other; and a converting circuit(14) for converting the level of data when a data indicated a high level or a low level is input to the input terminals of two latch circuits(10, 11) and detect the latch data as same.
申请公布号 KR20000011225(A) 申请公布日期 2000.02.25
申请号 KR19990010897 申请日期 1999.03.30
申请人 FUJITSU LIMITED 发明人 KAMA SHINKICHI;NAGASE TAKESI;OKUMURA YOSIKI;HAYASI TOMOHIRO;TAKAMATSYA YOSIHIRO
分类号 G06F7/00;G06F5/00;G06F13/14;G11C8/04;G11C8/06;(IPC1-7):G06F13/14 主分类号 G06F7/00
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