| 摘要 |
PROBLEM TO BE SOLVED: To prevent increase in a contact resistance between a plug and semiconductor layer for reduced manufacturing cost by, at least, providing a barrier metal layer formed on an inter-layer insulating film and a polysilicon layer which is formed over it and comprises a conductive impurity, and allowing a buried layer to directly connect to the polysilicon layer. SOLUTION: A polysilicon layer 43 comprising an N-type impurity is formed over the entire surface of a barrier metal layer 42, while it is buried in a bit line contact hole 12 a memory cell part and a bit line contact hole 27 at a peripheral circuit part as well to form buried layers 43A and 43B. Thus, no CMP process required for burying a polysilicon plug in the bit line contact holes 12 and 27 is required for reduced manufacturing cost. With a silicide film 41 formed at the upper end of a polysilicon plug 29, a contact resistance is less compared to a case where the barrier metal layer 42 such as TiN or WN directly contacts the polysilicon plug 29. |
