发明名称 |
Programmable packet header processor |
摘要 |
A programmable packet header processor apparatus reads, processes and reformats fields within a header of a data packet. The processor comprises a programmable header translator device which employs a plurality of parallel processing logic blocks 10a-10c for high throughput. The logic blocks operate with a downloaded microcode so that the processing algorithms can be easily modified for new protocol definitions.
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申请公布号 |
GB2340701(A) |
申请公布日期 |
2000.02.23 |
申请号 |
GB19980017725 |
申请日期 |
1998.08.15 |
申请人 |
* ROKE MANOR RESEARCH LIMITED |
发明人 |
NEIL * LAWTON;PAUL DAVID * RUSHTON |
分类号 |
H04L12/56;H04L29/06;(IPC1-7):H04L12/56 |
主分类号 |
H04L12/56 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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