发明名称 |
Advanced damascene planar stack capacitor fabrication method |
摘要 |
Capacitor storage charge can be increased by increasing storage node area. A high aspect surface ratio stack capacitor is produced without increasing overall cell dimensions. The node is formed with layers of low doped and high doped concentration borophosphosilicate glass which is deposited by a single process step with precise nanometer dimensions, are selectively etched so that either doped or undoped layers will have a higher etch rate. This etching creates finger-like projections in the node, which provide for greater surface area using a very simplified process requiring fewer processing steps.
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申请公布号 |
US6027968(A) |
申请公布日期 |
2000.02.22 |
申请号 |
US19970975193 |
申请日期 |
1997.11.20 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION;SIEMENS AKTIENGESELLSCHAFT;LAM RESEARCH CORPORATION |
发明人 |
NGUYEN, SON VAN;ILG, MATTHIAS;URAM, KEVIN J. |
分类号 |
H01L27/04;H01L21/02;H01L21/822;H01L21/8242;H01L27/108;(IPC1-7):H01L21/824 |
主分类号 |
H01L27/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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