发明名称 MULTIPROCESSOR
摘要 Datapath elements 1 1 to 1N can exchange data respectively with local memories 2 1 to 2N through data buses 6 1 to 6N, so that parallel operations can be performed. The data bus 6 1, which is connected with one datapath element 1 1, can be connected with the other data buses 62 to 6N through an interconnection network 5, so that by activating one datapath element 1 1 only, data exchange can be made with all of the local memories 2 1 to 2N through the data buses 6 1 to 6N and the interconnection network 5. Thus, the multiple datapath elements can perform the parallel operations with being related with the multiple local memories: and a simple configuration is employed such that one datapath element can access to any one of the local memories.
申请公布号 CA2138263(C) 申请公布日期 2000.02.22
申请号 CA19942138263 申请日期 1994.09.07
申请人 发明人 OKUMURA, YUKIHIKO;MIKI, TOSHIO;OHYA, TOMOYUKI;MIKI, YOSHINORI
分类号 G06F9/32;G06F9/38;G06F15/173;G06F15/80;(IPC1-7):G06F9/46 主分类号 G06F9/32
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