Digital frequency generator

摘要

PCT No. PCT/GB96/03240 Sec. 371 Date Apr. 8, 1998 Sec. 102(e) Date Aug. 4, 1998 PCT Filed Dec. 27, 1996 PCT Pub. No. WO97/24797 PCT Pub. Date Jul. 10, 1997Generating a clock signal having a desired frequency is accomplished by generating a pulse each time a stored accumulator value is found to be greater than or equal to a stored trigger value The seored accumulator value is incremented by a first iterative value n (r) until the stored accumulator value is greater than or equal to the stored trigger value. Subsequently, the stored accumulator value is decremented by a second iterative value until the stored accumulator value is less than the stored trigger value. During each iteration incrementing the stored accumulator value, a current frequency of the clock spinal is compared to a desired frequency value, and if the two values are different, the first iterative value (r) is corrected by a predetermined rate over one or more subsequent iterations until the frequency of the generator clock signal corresponds to the detected value of the desired frequency.