| 摘要 |
PROBLEM TO BE SOLVED: To control sensing operation adaptively to a variety of clock frequency signals by generating and a second control signal being applied to a latch circuit in addition to a first control signal in response to information corresponding to the pulse period of a clock signal and the latch circuit connected with the output of a sense amplifier. SOLUTION: Output from a sense amplifier 9 is transmitted through a sense amplifier latch circuit 11 to a data buffer 13. The sense amplifier 9 and the latch circuit 11 are connected with a sense amplifier control circuit 15 being applied with a clock signal CLK and a latency information signal LI. An address transition detecting circuit supplies a master signal MS. A mode register generating a signal for determining the number of clock cycles of the CLK before appearance of a first data bit supplies the latency information signal LI. The sense amplifier control circuit 15 operates the sense amplifier 9 and the latch circuit 11 with the latency information signal LI for regulating sensing operation optimally.
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