发明名称 MANUFACTURE OF SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To prevent an SOG film from remaining on the bottom part of via holes and slits from occurring in metal wiring side surfaces in a manufacture of a semiconductor device, that includes a process for forming an SOG film between fine wiring. SOLUTION: A metal film 4 and a first inter-layer insulating film 6 are formed on the entire surface of a semiconductor substrate 1 in this order. Then, these films are etched to form metal wiring made of the metal film 4. After this process, an SOG film 10 is coated, and heat treatment is performed. Furthermore, a second inter-layer insulating film 8 is formed. After the state shown in the figure, planarization is performed. The SOG film 10 on the metal wiring (metal film 4) is removed. Subsequently, the first inter-layer insulating film 6 is etched to form a plurality of via holes that reach the metal wiring.
申请公布号 JP2000049226(A) 申请公布日期 2000.02.18
申请号 JP19980215725 申请日期 1998.07.30
申请人 NEC CORP 发明人 TAKEWAKI TOSHIYUKI
分类号 H01L21/3213;H01L21/316;H01L21/3205;H01L21/768;H01L23/52;(IPC1-7):H01L21/768;H01L21/321;H01L21/320 主分类号 H01L21/3213
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