发明名称 Semiconductor integrated circuit and method for manufacturing the same
摘要 <p>An operational margin of a memory of a semiconductor integrated circuit device including an SRAM is improved. In order to set the Vth of driving MISFETs Qd, transfer MISFETs Qt and MISFETs for load resistance QL forming memory cells of an SRAM, relatively and intentionally higher than the Vth of predetermined MISFETs of SRAM peripheral circuits and logic circuits such as microprocessor, an impurity introduction step is introduced to set the Vth of the driving MISFETs Qd, transfer MISFETs Qt and MISFETs for load resistance, separately from an impurity introduction step for setting the Vth of the predetermined MISFETs. <IMAGE></p>
申请公布号 EP0980101(A2) 申请公布日期 2000.02.16
申请号 EP19990306081 申请日期 1999.07.30
申请人 HITACHI, LTD. 发明人 IKEDA, SHUJI;YOSHIDA, YASUKO;KOJIMA, MASSAYUKI;SHIOZAWA, KENJI;KIMURA, MITSUYUKI;NAKAGAWA, NORIO;ISHIBASHI, KOICHIRO;SHIMAZAKI, YASUHISA;OSADA, KENICHI;UCHIYAMA, KUNIO
分类号 H01L27/11;H01L21/8239;H01L21/8244;H01L27/105;(IPC1-7):H01L27/11;H01L21/824 主分类号 H01L27/11
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