发明名称 Method and interface for interconnection using high bit rate serial links
摘要 The interface and interconnection method has parallel high transmission rate channels exchanging information. At transmission and reception, the analogue base clocks of each module on the reference clock are synchronised by a master module, the synchronised units being slave modules.
申请公布号 EP0980158(A1) 申请公布日期 2000.02.16
申请号 EP19990401994 申请日期 1999.08.05
申请人 BULL S.A. 发明人 LECOURTIER, GEORGES;KASZYNSKI, ANNE
分类号 G06F15/16;H04B1/38;H04J3/06;H04L5/16;H04L7/00;H04L7/08;H04L12/50;H04L23/00;H04L25/14 主分类号 G06F15/16
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