| 摘要 |
PROBLEM TO BE SOLVED: To restrain MOS transistors in a Bi-CMOS device with respect to dispersion in characteristics. SOLUTION: This manufacturing method is carried out in a manner, where component element such as a resistive element 1, an NPN bipolar transistor 2, a P-channel MOS transistor 3, and an N-channel MOS transistor 4 are formed on an Si substrate 10. A base extraction electrode 18A and an emitter extraction electrode 29 are formed in a manner where they are self-aligned with each other, and then an outer base layer 21 and an emitter layer 27 are formed in a self-aligned manner through the diffusion of impurities contained in the electrodes 18A and 29. Ion implantation carried out for the formation of the LDD layers of MOS transistors 3 and 4 are performed in a state, where only an L-shaped silicon nitride film of an emitter/base forming region 17 is left unremoved, while an L-shaped silicon nitride film located by the side of the gate electrodes 18C and 18D is removed. With the setup, a MOS transistor equivalent in characteristics to that manufactured through general manufacturing processes can be obtained.
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