| 摘要 |
<p>PROBLEM TO BE SOLVED: To efficiently process data with long word length or bit length by including a reserved bit switch in an instruction for operating data, and executing the instruction based on the status. SOLUTION: A reserved bit switch is provided for every instruction word. Thus, the instruction is executed only once so as to be operated on single word data, or the same instruction is repeatedly executed so as to be successively operated on the chain or list of data. Therefor, the hardware is constituted so that the number of the repeated counts and words in the chain is controlled by a chain register 17, an accumulating function for an ALU 31 is provided in an accumulate register file 36, two or less input operand chains and one output operand chain are successively obtained under the control of a specific address, and an ALU status logic is provided, then the content of a product host register 34 is transmitted to the partial sum input of a hardware multiplier 30.</p> |
