| 摘要 |
PROBLEM TO BE SOLVED: To compose a multiframe synchronizing detector with a little circuit configurations. SOLUTION: This device is provided with a synchronizing bit extracting means 10 for extracting the respective bits of a multiframe synchronizing signal from a multiframe, plural shift registers 12 for successively inputting and temporarily holding the respective extracted bits, bit pattern detecting means 13 and 14 for comparing continuous bit streams from the respective shift registers with prescribed bit pattern groups constituting the multiframe synchronizing signal, an input bit stream selecting means 20 for successively inputting the bit streams from the plural shift registers to the said bit pattern detecting means, plural counters 21 for storing the number of times of pattern coincidence through the said comparison for each shift register, and a synchronizing discriminating means 11 for monitoring the said plural counters and discriminating the synchronism of the multiframe based on the case that any one of counters reaches the prescribed number of times. |
