发明名称 READ AND WRITE CIRCUIT FOR MEMORY CELL
摘要 PROBLEM TO BE SOLVED: To efficiently execute the reading and writing (refreshing) of data by eliminating a special period for precharging. SOLUTION: This circuit is provided with memory cells which store charge corresponding to levels of bit lines Bit by instructions of write word lines WWrd at the time of write-in and on the other hand which transit levels of the bit lines Bit corresponding to the stored charge by instructions of read word lines RWrd at the time of readout, transistors 11 connecting the bit lines Bit to a power source voltage Vdd at the time of readout, an inverter 12 reading out data written in the memory cells by whether the levels of the bit lines Bit are transited from pull-up levels or not at the time of readout and an inverter 15 which selects read out data or data which are to be newly written by selectors 14 and transits the levels of the bit lines Bit to the levels corresponding to the data.
申请公布号 JP2000040359(A) 申请公布日期 2000.02.08
申请号 JP19980204048 申请日期 1998.07.17
申请人 YAMAHA CORP 发明人 TANAKA TAISHIN
分类号 G11C11/405;(IPC1-7):G11C11/405 主分类号 G11C11/405
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