发明名称 DIFFERENTIAL AMPLIFIER AND ITS SPEED ADJUSTMENT METHOD
摘要 PROBLEM TO BE SOLVED: To improve yield even when unexpected fluctuation exists in a process condition by providing plural constant current transistors, connecting these plural transistor in parallel and selecting a prescribed transistor from plural transistors. SOLUTION: Plural constant current transistors 2, 3, 4 are connected in parallel, and the prescribed transistor is selected from plural transistors 2, 3, 4 by selection circuits 5, 5a, 5b. When a reset signal 13 is set in L level first beforehand, a switching transistor 9 goes to the on-state, and the transistors 2, 3, 4 goes to the off-state in the selection circuits 5, 5a, 5b. When the reset signal 13 is released, and a terminal 12 of a NAND gate 15 is made to H level, the transistors 2, 3, 4 goes to the on-state. For obtaining prescribed performance, when the fuse circuit 8 of the selection circuit 5 is cut out, the transistor connected to the selection circuit is on/off controlled, and a response speed of a DRAM input circuit is adjusted.
申请公布号 JP2000040368(A) 申请公布日期 2000.02.08
申请号 JP19980203770 申请日期 1998.07.17
申请人 NEC IC MICROCOMPUT SYST LTD 发明人 KITANO NAOKI
分类号 G11C11/419;G11C11/409;G11C11/417;H03K19/0175;(IPC1-7):G11C11/409 主分类号 G11C11/419
代理机构 代理人
主权项
地址