发明名称 SIGNAL PROCESOR AND COMMUNICATION MACHINE
摘要 PROBLEM TO BE SOLVED: To integrate a circuit for the frequency conversion processing of an input signal with a GHz band. SOLUTION: In a receiver 21, an input signal from an antenna 24 is amplified, by removing the component of a band except for a frequency band for a communication network and is given to an operation processing part 36. A plurality of sample circuits in the operation processing part 36 sample the amplified input signals, in response to a plurality of clock signals whose frequencies are equal and whose phases differ from each other. A product sum computing element in the operation processing part 36 makes a response to any one clock signal and periodically executes a product sum operation using a plurality of sample signals, showing the sampling results of all the sample circuits. A signal outputted from the product sum computing element contains a folded component equivalent to that obtained by frequency-converting a component in the frequency band in the input signal. A selection processing part 29 extracts the folded component from the signal and converts the carrier frequency of the folded component into an intermediate frequency. Then, the converted folded component is demodulated.
申请公布号 JP2000040920(A) 申请公布日期 2000.02.08
申请号 JP19980205610 申请日期 1998.07.21
申请人 SHARP CORP 发明人 TODA MANABU
分类号 H03D7/00;G06F1/06;H03D3/00;H03H17/00;H03H17/06;H04B1/26;(IPC1-7):H03D7/00 主分类号 H03D7/00
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