发明名称 |
FABRICATING METHOD OF EEPROM |
摘要 |
PURPOSE: A method of fabricating an EEPROM(electrically erasable and programmable read only memory) is provided to prevent a tinning phenomenon by forming a lower voltage gate oxide layer using a wet etching process. CONSTITUTION: The method comprises the steps of nitrifying a semiconductor substrate in which a high voltage gate insulating layer and a tunnel insulating layer are formed; sequentially forming a floating gate electrode and an insulating layer on an overall surface of the semiconductor substrate, wherein the insulating layer is composed of multiple layers; sequentially etching the insulating layer, the floating gate electrode layer, and the high voltage gate insulating layer down to a top surface of the semiconductor substrate of a low voltage region using a mask exposing an only low voltage region; forming a low voltage gate insulating layer on the semiconductor substrate of the low voltage region using a wet etching process; and forming a control gate electrode layer on an overall surface of the semiconductor substrate.
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申请公布号 |
KR20000007533(A) |
申请公布日期 |
2000.02.07 |
申请号 |
KR19980026911 |
申请日期 |
1998.07.03 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
YOO, TAE GWANG;SIM, BYEONG SEOP |
分类号 |
H01L27/10;(IPC1-7):H01L27/10 |
主分类号 |
H01L27/10 |
代理机构 |
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代理人 |
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地址 |
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