发明名称 SYNCHRONIZING TYPE MODULO N COUNTER USING D FLIP-FLOP
摘要 PURPOSE: A synchronizing typed modulo N counter circuit is provided to have the whole simple hardware constitution, and to reduce the constitution size of the hardware, and to reduce the power consumption. CONSTITUTION: The synchronizing typed modulo N counter comprises: a device(10) to output by counting up an input signal; at least two D flip-flops(20,30) to output the signal inputted from the count-up device. The output of the D flip-flops is the feedback by the count-up device. The count-up device counts to 0 when the signal inputted form the D flip-flops is a binary number(N-1). The whole hardware constitution is made simple by organizing the D flip-flop for a JK flip flop on the synchronizing typed modulo N counter circuit.
申请公布号 KR20000007308(A) 申请公布日期 2000.02.07
申请号 KR19980026587 申请日期 1998.07.02
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 CHAE, DAE GON
分类号 H03K23/00;(IPC1-7):H03K23/00 主分类号 H03K23/00
代理机构 代理人
主权项
地址