METHOD FOR MANUFACTURING HETERO-JUNCTION BIPOLAR TRANSISTOR

摘要

PURPOSE: A hetero-junction bipolar transistor fabrication method is provided to reduce a size effect due to a decreasing of current gain by using non-doped compound semiconductor formed at sidewalls of an emitter. CONSTITUTION: The method comprises the steps of sequentially growing a sub-collector(12), a collector(13), a base(14), an emitter(15) and an emitter cap layer(16) on a semi-insulating compound semiconductor substrate(11); etching the emitter cap layer(16) and the emitter(15) using an insulator pattern(17) as a mask; regrowing an emitter sidewall(18) made of non-doped compound semiconductor at both side of the etched emitter cap layer(16) and emitter(15), thereby increasing the size of emitter region and reducing the size effect; removing the insulator pattern(17); simultaneous forming an emitter electrode(21) and a base electrode(22) using lift-off; and forming a collector electrode(23).