| 摘要 |
There is provided a semiconductor memory device including a memory cell array having a plurality of multiple logical value memory cells arranged in a matrix, each memory cell storing a plurality of charge conditions each representing a logical value, a word line for selecting a memory cell in a column direction, a bit line for selecting a memory cell in a row direction, and a reading circuit for reading data stored in a selected memory, wherein the reading circuit includes a semiconductor superlattice including at least two sub-band levels under a continuation band, the semiconductor superlattice receiving bit line signals transmitted from the bit line, and transmitting an output signal each time when the bit line signal passes over each of the sub-band levels, and a counter for counting the output signals to output read logical values. For instance, the semiconductor superlattice includes a semiconductor substrate having a first conductivity, a diffusion layer formed on the semiconductor substrate and having a second conductivity, a contact layer formed on the diffusion layer by selective epitaxial growth and having a second conductivity, a superlattice layer including the predetermined number of layers and formed on the contact layer, and a pn junction layer formed on the superlattice layer. The semiconductor memory device makes it no longer necessary to prepare a plurality of reference voltages and sense amplifiers, and makes it possible to provide a plurality of read logical values in a single operation. |
