发明名称 Self-test method for digital or microprocessor-controlled overload protection arrangement
摘要 The method involves detecting a current flowing in three phases over a pre-settable period of time, and using a fraction of a smallest current value in the three phases detected during the pre-settable period as a test value of an over-current, instead of a predetermined over-current value of a normal operation. A period of time between the setting of the test over-current value and the point in time, in which the current flowing in all three phases falls under a pre-settable fraction of the nominal current value is determined. One sixth of the current value in the three phases detected during the pre-settable period is preferably used as the test over-current value.
申请公布号 DE19834469(A1) 申请公布日期 2000.02.03
申请号 DE19981034469 申请日期 1998.07.30
申请人 SIEMENS AG 发明人 SCHAFMEISTER, HEINRICH;PRUMBACH, WILHELM-HERMANN
分类号 H02H3/04;(IPC1-7):G01R31/00 主分类号 H02H3/04
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