发明名称 LOW TEMPERATURE PROCESS FOR FABRICATING LAYERED SUPERLATTICE MATERIALS AND MAKING ELECTRONIC DEVICES INCLUDING SAME
摘要 <p>A liquid precursor containing thallium is applied to a first electrode (28, 58), RTP baked at a temperature lower than 725 °C, and annealed at the same temperature for a time period from one to five hours to yield a ferroelectric layered superlattice material (30, 60). A second electrode (32, 77) is formed to form a capacitor (16, 72) and a second anneal is performed at a temperature lower than 725 °C. If the material is strontium bismuth thallium tantalate, the precursor contains (m-1) mole-equivalents of strontium for each of (2.2-x) mole-equivalents of bismuth, x mole-equivalents of thallium, and m mole-equivalents of tantalum, where m=2 and 0.0∫x≤2.2.</p>
申请公布号 WO2000005757(A1) 申请公布日期 2000.02.03
申请号 US1999015351 申请日期 1999.07.07
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