发明名称 DEINTERLEAVING CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a deinterleaving circuit which can reduce its storage capacity. SOLUTION: An address data generator 3 is added to a deinterleave memory 4 to output the address data A in the order that is decided based on deinterleaving. Then a main signal which is stored in an address position of the memory 4 that is designated by the data A is read out, and the next main signal to be interleaved and inputted is written in the address position. Thus, the storage capacity of the memory 4 is defined as the capacity equivalent to one super frame.
申请公布号 JP2000036765(A) 申请公布日期 2000.02.02
申请号 JP19980218705 申请日期 1998.07.17
申请人 KENWOOD CORP 发明人 HORII AKIHIRO;SHIRAISHI KENICHI;SHINJO SOICHI
分类号 H04N19/423;G06F12/00;H03M1/00;H03M13/27;H04B7/185;H04L25/40;H04L27/06;H04N7/08;H04N7/081;H04N7/24;H04N19/00;H04N19/426;H04N19/44 主分类号 H04N19/423
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