发明名称 NONVOLATILE SEMICONDUCTOR MEMORY
摘要 <p>PROBLEM TO BE SOLVED: To prevent the occurrence of reading data erroneously even though a threshold value varies by setting the writing verify voltage of a word line and a reading voltage to be higher than a power supply voltage and executing writing and reading operations. SOLUTION: During a data reading, a reading voltage Vr, which is higher than a power supply voltage Vcc, or verify voltages Vvw and Vve are applied to the word lines to which memory cells, that are to be selected, are connected. Moreover, the main bit selection line corresponding to the memory cell to be selected is precharged to a prescribed potential. Then, the voltage Vvw is set to the voltage higher than the voltage Vcc or a slightly higher voltage, the voltage Vr is set to the voltage that is higher than the voltage Vcc for a prescribed margin. Furthermore, an erasing verify voltage Vve is set to the voltage which is higher than the voltage Vr for a prescribed margin. Thus, the threshold value voltage distribution of the memory cell is departed from a deplete level after a writing.</p>
申请公布号 JP2000036196(A) 申请公布日期 2000.02.02
申请号 JP19980203119 申请日期 1998.07.17
申请人 HITACHI LTD;HITACHI TOBU SEMICONDUCTOR LTD 发明人 KASAI HIDEO;ETO JUN
分类号 G11C11/41;G11C16/06;(IPC1-7):G11C11/41 主分类号 G11C11/41
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