发明名称 HIGH VOLTAGE TEST METHOD
摘要 PROBLEM TO BE SOLVED: To verify interface insulation easily and simply without impressing higher voltage than voltage to ground by impressing antiphase power of 50% of fixed power on power conductors of the other two phases, when fixed voltage is impressed on a power conductor of one phase of a three-phase package electrical machinery and apparatus. SOLUTION: Fixed voltage V is generated between the terminals U-E on the secondary side of a transformer 1 for testing the single phase. At this time, because voltage V/2 is generated between the terminals V-E on the secondary side, and the exciting direction of a coil is reverse, it becomes voltage of different phase by 180 degrees. Then the voltage V of the U-terminal is impressed on the R-phase impressed terminal 3a of a three-phase batch electrical machinery and apparatus 2 through an impressing line 4a, simultaneously with it, the voltage V/2 of the V-terminal is respectively impressed on a S-phase impressed terminal 3b and a T-phase impressed terminal 3c through an impressing line 4b. Hereby, the voltage V is impressed between the terminal 3a and the chest of the machinery and apparatus 2, the voltage V/2 of antiphase is impressed between the terminals 3b, 3c and the chest, and voltage V+(-V/2) is impressed between the terminal 3a and the terminals 3b, 3c.
申请公布号 JP2000035457(A) 申请公布日期 2000.02.02
申请号 JP19980203664 申请日期 1998.07.17
申请人 MITSUBISHI ELECTRIC CORP 发明人 NAKAZAWA TAKASHI;KADOKAWA KAZUTAKA
分类号 G01R31/12;(IPC1-7):G01R31/12 主分类号 G01R31/12
代理机构 代理人
主权项
地址