发明名称 Memory system having flexible bus structure and method
摘要 A memory system having a memory controller connected to multiple memory devices by way of a system bus. The memory controller issues device select, memory program and memory read instructions for the memory devices over the system bus, with the device select instructions including a device select address and a device select command. The memory devices each include an array of memory cells and a memory operation manager which functions to carry out memory read and program operations on the array. The memory operation manager includes an address comparator which compares the device select address received on the system bus with a local address stored in the memory device and a command decoder which detects commands on the system bus, with the memory operation manager operating to switch the memory device from a device-disabled state to a device-enabled state when the memory device receive a select address which matches the local address together with one of the device select commands.
申请公布号 US6021459(A) 申请公布日期 2000.02.01
申请号 US19970847641 申请日期 1997.04.23
申请人 MICRON TECHNOLOGY, INC. 发明人 NORMAN, ROBERT D.;LAKHANI, VINOD C.;CHEVALLIER, CHRISTOPHE J.
分类号 G06F12/06;(IPC1-7):G06F12/06 主分类号 G06F12/06
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