| 发明名称 |
Bit synchronization for interrogator |
| 摘要 |
A bit synchronization device for an interrogator in a remote intelligent communication system wherein a programmable divider extracts a bit clock from the bits in a bitstream using a clock rate 64 times the data rate and wherein the divider is responsive to an early/late detector for adding or subtracting a count from the divider counter.
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| 申请公布号 |
US6021503(A) |
申请公布日期 |
2000.02.01 |
| 申请号 |
US19960781884 |
申请日期 |
1996.12.21 |
| 申请人 |
MICRON COMMUNICATIONS, INC. |
发明人 |
PAX, GEORGE E.;OVARD, DAVID K. |
| 分类号 |
G06F1/04;G06F1/12;H03L7/085;H03L7/099;H04L7/033;H04L27/233;(IPC1-7):G06F1/04 |
主分类号 |
G06F1/04 |
| 代理机构 |
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| 主权项 |
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