发明名称 Apparatus and method of snooping processors and look-aside caches
摘要 The present invention provides a method and apparatus for providing memory coherency among an L1 and an L2 cache memory devices and a main memory device. In an embodiment of the invention, a memory controller generates an address snoop for locating modified copies of a data residing in the main memory. As a result of the snoop, the memory controller is notified as to whether a modified copy of the data is in the cache memory devices. If both cache memory devices have a modified copy of the data, the modified copy in the L2 cache will not be allowed to be transferred since modified copies of data in the L1 cache memory are considered to always be the most recent copies of the data. Thus, if the L1 cache memory is unable to transfer the data, The memory controller will continue to snoop the address until the L1 cache memory transfers the data. If, however, there is only one copy of the modified data and it resides in the L2 cache memory device, the copy will be allowed to be transferred to the memory controller.
申请公布号 US6021474(A) 申请公布日期 2000.02.01
申请号 US19980076798 申请日期 1998.05.13
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 MILLING, PHILIP ERNA
分类号 G06F12/08;(IPC1-7):G06F11/30;G06F12/12 主分类号 G06F12/08
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