发明名称 Transferring data between caches in a multiple processor environment
摘要 A cache system for multiple processors including multiple caches, one of the caches serving each respective processor, a main memory system, and a bus interconnecting the caches and the main memory, the bus allowing data to be written directly between the caches without accessing the main memory system.
申请公布号 US6021466(A) 申请公布日期 2000.02.01
申请号 US19960615401 申请日期 1996.03.14
申请人 COMPAQ COMPUTER CORPORATION 发明人 OLARIG, SOMPONG P.
分类号 G06F12/08;(IPC1-7):G06F12/08 主分类号 G06F12/08
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