发明名称 PICTURE DISPLAY DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a picture display device in which a good quality picture having a high gradation is obtained without increasing the frequency of a PWM clock even though the PWM interval becomes shorter as the frequency of horizontal scanning becomes higher. SOLUTION: A clock delay section 61 generates four kinds of clocks having different phases from a reference clock generated by a reference clock generating section 60 and a clock selector 62 selects one clock from among the four kinds of clocks in accordance with the low-order bit of digital video signals. A counter 63 counts the selected clock and its output and the high-order bit of the digital video signals are compared in a comparator 64. A PWM section 65 determines the rising position of the output waveforms based on the result of the comparision. The falling position is determined according to a reset pulse input and fixed.
申请公布号 JP2000029424(A) 申请公布日期 2000.01.28
申请号 JP19980198807 申请日期 1998.07.14
申请人 MATSUSHITA ELECTRON CORP 发明人 TANIGUCHI HIROSHIGE;HAMADA KIYOSHI
分类号 H04N9/16;G09G1/00;G09G1/20;G09G3/20;G09G5/00;(IPC1-7):G09G3/20 主分类号 H04N9/16
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