| 摘要 |
PROBLEM TO BE SOLVED: To enable effective prevention of deterioration of charge holding characteristics caused by a pattern shift at the time of forming a gate, and also enable reduction of a source voltage due to a wiring resistance and reduction of a cell area. SOLUTION: A first active region in which first transistors (drive transistor and word transistor) are to be formed and a second active region in which a second transistor (load transistor) is to be formed are arranged so channel current directions of the transistors are parallel to each other in the respective memory cells, and are also separated between adjacent cells in a direction perpendicular thereto. A power voltage supply line VCC is a groove wiring line of a 2-layer contact structure in which the power voltage is supplied to an impurity region. Further a bit-line connection wiring line 182 is also of a groove wiring type. One of the power voltage supply lines may be used commonly between the adjacent cells in a direction perpendicular to the wiring line direction, and memory node wiring layers 50a and 50b may be formed with different etching masks. |
