OSCILLATOR CIRCUIT

摘要

PROBLEM TO BE SOLVED: To reduce the attenuation of the oscillation amplitude of an output terminal side at the time of switching a gate for oscillation and to prevent the defect of clock pulses by detecting an oscillation state on the input terminal side of the gate for the oscillation. SOLUTION: By the ON of an NMOS transistor N1, an oscillation operation started by the positive feedback loop of an NMOS inverter by a load circuit 2 and the NMOS transistor N2 and an oscillator 1. An oscillation detection circuit 3 outputs inversion pulses synchronized with the oscillation amplitude on the side of an input terminal X1 and the output terminal (q) of a pulse counting circuit 4 is shifted to an H level. A PMOS transistor P3 is turned OFF and the load circuit 2 is turned to an OFF state. The output of an inverter G1 becomes an L level and the PMOS transistor P1 is turned ON. A CMOS inverter composed of the PMOS transistor P2 and the NMOS transistor N2 is turned to an active state and the gate for the oscillation is switched from the NMOS inverter to a CMOS inverter type.