发明名称 MEMORY DEVICE
摘要 PROBLEM TO BE SOLVED: To reduce current consumption by decreasing the number of times of supplying a clock for synchronization. SOLUTION: In a non-power-down state of a memory, supply of a clock to a data output circuit is limited to a read-state after receiving a read- command, supply of a clock is not performed at the time of an active state and a write-state. Further, in the best mode, supply of a clock to a data output circuit 40 is started after the number of clocks corresponding to cache latency set after receiving a read-command in a read-state after receiving a read- command, and after output of read-out data from a data output circuit 40 is started, stopped after the number of clocks corresponding to set burst length. Therefore, even in a non-power-down state, the number of times of supplying clocks required for driving a large current can be decreased by supplying clocks only in a period in which read-out data is actually outputted to the outside from the data output circuit 40.
申请公布号 JP2000030456(A) 申请公布日期 2000.01.28
申请号 JP19980198590 申请日期 1998.07.14
申请人 FUJITSU LTD 发明人 KANEZASHI KAZUYUKI;UCHIDA TOSHIYA;OKUDA MASAKI
分类号 G11C11/409;G11C7/10;G11C11/407;(IPC1-7):G11C11/409 主分类号 G11C11/409
代理机构 代理人
主权项
地址