| 摘要 |
PROBLEM TO BE SOLVED: To perform the effective suppression and high-speed convergence of intermediate signal components by computing the adjustment signals of a vector modulator by a computer using a cyclic least square method. SOLUTION: An adder 68 for signal cancellation receives signals generated by a signal cancellation vector modulator 66 and input signals Vm and generates error signals Vd. An error signal cancellation vector modulator 70 receives the error signals Vd and generates error adjustment signals. The adder 74 for error signal cancellation outputs output signals V0 for which the input signals not provided with intermediate modulation signal components are amplified. A digital signal processor 76 receives the input signals Vm, the error signals Vd and the output signals V0 and calculates signal cancellation adjustment signalsαand error signal cancellation adjustment signalsβby using least square mean algorithm. Then, the adjustment signalsαare supplied to the modulator 66 and the adjustment signalsβare supplied to the modulator 70.
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