| 摘要 |
PROBLEM TO BE SOLVED: To provide a processor capable of achieving a high operation frequency. SOLUTION: In this processor for dividing instruction into (n) (n>=2) pieces of stages, successively performing it, parallelly executing the different stages of continuous plural instructions based on clock signals and performing a pipeline processing, an arithmetic operation module 12a for performing an arithmetic operation and a logical operation module 12b for performing a logical operation are mutually independently designed by using a hardware description language and arranged in different areas on a substrate and the arithmetic operation and the logical operation are respectively executed within one clock cycle of the clock signals.
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