| 摘要 |
PROBLEM TO BE SOLVED: To make it possible to secure an error alignment margin in photo processing by forming a material layer pattern which is formed with an interconnection contact hole region for a peripheral circuit region. SOLUTION: On an interlayer insulating film 22, a material layer pattern 24 is so formed that a storage electrode contact hole region for a cell array region and an interconnection contact hole region for a peripheral circuit region can be formed. A thick interlayer insulating film 26 is formed on part of the material layer pattern 24 in the peripheral circuit region and a first interconnection is so formed as to be electrically connected with a semiconductor substrate 10 through the interlayer insulating films 26, 22 and insulating layers 18, 14. The material layer pattern 24 is formed of such substance as to have an etch rate of at least 1:5 against the interlayer insulating films 26, 22 and the insulating layers 18, 14. For example, the interlayer insulating films 26, 22 and the insulating layers 18, 14 are formed of an oxide or the like while the material pattern 24 is formed of silicon or the like. |
