| 摘要 |
PROBLEM TO BE SOLVED: To reduce current consumption and a peak current at the time of transferring data in a semiconductor integrated circuit integrating a DRAM and a logic circuit in one chip. SOLUTION: When data is transferred to a logic section 3 from a DRAM array section 1, data of a minute signal read out from a memory cell 5 is amplified to a low signal level which can be amplified by register 9 of the logic section 3 in the DRAM array section 1 side having large parasitic capacity and a heavy load, after a signal is transferred to the register 9 of the logic section 3 from the DRAM array section 1 by a transfer gate 2, it is amplified to a power source level by the register 9. Rewriting for a memory cell 5 is performed with arbitrary timing after data is transferred to the logic section 3 from the DRAM array section 1.
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