发明名称 MEMORY ELEMENT AND MEMORY ARRAY
摘要 PROBLEM TO BE SOLVED: To provide a memory element which does not consume much electric power and in which information can be written and erased at high speeds. SOLUTION: A charge storing layer 15 is formed on a conductive area 13 through an insulating layer 14a, and a gate electrode 16 is formed on the storing layer 15 through another insulating layer 14b. Then probability modulating electrodes 17 are formed on the side sections of the storing layer 15 through insulating layers 14d. The thickness of the insulating layer 14a is adjusted to such a value that changes can tunnel their ways through the layer 14a, and the thicknesses of the insulating layers 14b and 14d are adjusted to such thicknesses that the charges cannot easily tunnel their ways through the layers 14b and 14d. At the time of writing and erasing information, a potential is impressed not only upon the gate electrode 16 but also upon the probability modulating electrodes 17. Consequently, the tunneling probability of the changes between the conductive area 13 and charge storing layer 15 is spatially modulated and the tunneling probability of the charges is remarkably increased. Therefore, information can be written and erased at high speed with a low voltage.
申请公布号 JP2000031304(A) 申请公布日期 2000.01.28
申请号 JP19980197817 申请日期 1998.07.13
申请人 SONY CORP 发明人 NOMOTO KAZUMASA;FUJIWARA ICHIRO
分类号 H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L21/824 主分类号 H01L21/8247
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