发明名称 Herstellungsverfahren für ein Halbleiterbauelement mit DMOS-Transistor
摘要 To provide a method of manufacturing a BiCMOS device including a DMOS which reduces manufacturing steps, shortens manufacturing time and reduces manufacturing cost. A channel ion implanted layer 8 is formed by implanting acceptor impurities from the surface of a P type well 5. A poly-silicon gate electrode 10 is formed on gate insulation film 9 and local oxide film 7a. Then, impurity ions are implanted for forming P type base region 21 by employing the bipolar transistor process and by using the gate electrode 10 as a mask. Then, side walls 25, 25 are formed at high temperature on both sides of the gate electrode 10 by employing the CMOS process of forming the LDD structure. At the same time, the P type base region 21 is formed by diffusing the implanted impurity ions. Then, an N<+> type source region 26NS is formed self-aligned by employing the CMOS process for forming the N<+> type source and drain of the CMOS transistor and by using the gate electrode 10 as a mask for the self alignment. <IMAGE>
申请公布号 DE69511160(T2) 申请公布日期 2000.01.27
申请号 DE1995611160T 申请日期 1995.05.12
申请人 FUJI ELECTRIC CO., LTD. 发明人 KITAMURA, MUTSUMI;FUJISHIMA, NAOTO
分类号 H01L27/06;H01L21/336;H01L21/8249;H01L29/78 主分类号 H01L27/06
代理机构 代理人
主权项
地址