发明名称 OUTPUT CIRCUIT, LEVEL CONVERTER CIRCUIT, LOGIC CIRCUIT AND OPERATIONAL AMP CIRCUIT
摘要 PURPOSE: A level converting circuit having an output circuit, a logic circuit, and a operational amp circuit is provided to output an output signal having a frequency width exceeding a tolerant voltage of an MOS transistor. CONSTITUTION: The output circuit including a CMOS inverter circuit, and for outputting an output signal changing at an external supply voltage level based on a binary input signal comprises: a control circuit(2) which supplies a voltage between a voltage low by a threshold voltage of a PMOS transistor(TP) from a voltage level of a high voltage level and another voltage high by a threshold of a NMOS transistor(TN) to the gate of the each transistor as a reference voltage(V3), and sets source voltages of the PMOS transistor as a supply voltage level(V1) of the high voltage level by making rise source voltages of the both transistors by synchronizing when the input signal is a first level, and sets source voltages of the NMOS transistor as a supply voltage level(V2) of the low voltage level by making fall source voltages of the both transistors by synchronizing when the input signal is a second level and lowers a gate-source voltage of the PMOS transistor than the threshold.
申请公布号 KR20000004886(A) 申请公布日期 2000.01.25
申请号 KR19980059302 申请日期 1998.12.28
申请人 FUJITSU LIMITED 发明人 OKADA KOJI
分类号 H03K19/003;H03K19/0175;H03K19/0185;H03K19/0948;(IPC1-7):H03K19/018 主分类号 H03K19/003
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