METHOD FOR MANUFACTURING MOS FIELD EFFECT TRANSISTORS

摘要

PURPOSE: A fabrication method of an MOS field effect transistor having an LDD(lightly doped drain) structure is provided to prevent downing of threshold voltage and remove trade-off between punch-through voltage and conductivity by using double gate polysilicon and a native oxide. CONSTITUTION: The method comprises the steps of: forming a gate oxide(12) on a silicon substrate(10); forming a first polysilicon layer(14) on the gate oxide(12); growing a native oxide(16) on the first polysilicon layer(14); forming a second polysilicon layer(18) having thick thickness compared to the first polysilicon layer on the native oxide(16); exposing a portion of the first polysilicon layer(14); forming a lightly doped impurity region(22a,22b) by ion-implantation into the exposed polysilicon layer; forming a spacer(24) at both sides of the native oxide and the polysilicon layers; exposing a portion of the lightly doped impurity region(22a,22b) by blanket etching the exposed first polysilicon(14); forming an SELOCS(SELective Oxide Coating of Silicon-gate) oxide(26) at sides of the first polysilicon layer(14a); and forming highly doped impurity regions(28a,28b).