TEST PATTERN OF SEMICONDUCTOR DEVICES

摘要

PURPOSE: A test pattern of semiconductor devices is provided to exactly measure a sheet resistance(Rs) and a width variation of source junction and lines if a loading effect and a line bridge are generated. CONSTITUTION: The test pattern for monitoring sheet resistance, width variation and line bridge comprises a first test pattern(11) of big size having a width and a length, and a second test pattern(15). The second test pattern(15) includes a plurality of fine test patterns(13) having narrow width and small length compared to the first test pattern(11). The fine test patterns(13) are arranged spaced apart from each other between a com pad(21) and a T1 pad(17). The com pad(21) and the T1 pad(17) are connected to a fine test pattern(13a).