TEST PATTERN FOR SEMICONDUCTOR DEVICE

摘要

PURPOSE: A test pattern for a semiconductor device is provided to measure a reiteration of a device, and to detect misalignment of the device. CONSTITUTION: The test pattern for a semiconductor device comprises: a lower plate(31B) formed in a scribe line area of a wafer, and which is the same conductive materials as a lower conductive layer; at least a hole(33B) formed on the lower plate when forming a contact hole(33); a plug formed within the hole of the lower plate when burying the contact hole of the lower conductive layer(31); and an upper plate(34B) formed in an interlayer insulation layer(32) in the neighborhood of the plug when forming the upper conductive layer(34), wherein misalignment and reiteration between the upper conductive layer and the contact hole of the device area through a electrical measurement between the lower plate and the upper plate.